EDAPS
EDAPS

AMD


EDAPS

INTEL

PENN STATE

ANSYS



EDAPS

EPS


Keynote Presentations


Keynote I


High-Speed Signal Integrity – Challenges and Opportunities.

Bhyrav Mutnury,

AMD, Technology and Engineering Division



Bhyrav Mutnury is a Senior Fellow at AMD, part of Technology and Engineering division where he is responsible for designing next generation high-speed interfaces. Prior to this, Dr. Mutnury was a Senior Distinguished Engineer at Dell Technologies. He received his Doctor of Philosophy degree in Electrical Engineering in 2005 from the Georgia Institute of Technology, Atlanta, GA. Dr. Mutnury has authored more than 100 publications in various conferences and journals. Dr. Mutnury has 300 issued patents and another 50 in the pipeline. He is currently an IEEE Fellow and the recipient of IEEE EMC Technical Achievement Award.




Keynote II


Multiphysics and Multiscale Modeling of IC Sensor Packaging and Systems

Rajen Murugan,

Texas Instruments, Inc.

Abstract: As traditional transistor and chip scaling face diminishing returns and escalating costs, the semiconductor industry is turning to advanced packaging technologies to push innovation forward in the "More than Moore" era. These cutting-edge packaging approaches offer new opportunities but also introduce complex challenges that conventional design verification tools struggle to address. The increased miniaturization and integration of today's solutions intensify the interplay of electrical, thermal, and mechanical factors across the entire chip-package-PCB ecosystem. Without a transformative shift in modeling and verification strategies, companies risk costly delays, design re-spins, and missed market windows. Enter multiphysics system co-design (MSC-D): a next-generation methodology that promises to deliver first-pass design success by tackling these multidimensional challenges head-on.

In this presentation, discover how the MSC-D methodology is revolutionizing high-performance, cost-effective IC packaging design. I'll discuss real-world validation using silicon lab measurements for two advanced current sensor types: a precision shunt-resistor sensor and a high-precision, high-voltage (600V) Hall-Effect sensor. I will introduce the toughest challenges, reveal the most significant breakthroughs, and spotlight the transformative opportunities that multiphysics system co-design (MSC-D) brings to the future of semiconductor innovation.



Dr. Rajen Murugan is a Distinguished Member of the Technical Staff at Texas Instruments, Inc., where he develops multiphysics simulation and modeling methodologies for advanced semiconductor packaging and systems. He holds 76 granted patents and has authored over 80 papers in peer-reviewed IEEE journals and conferences. Dr. Murugan earned his Ph.D. in Applied Electromagnetics from the University of Manitoba, Canada, and serves as an Affiliate Assistant Professor at the University of Washington's Electrical Engineering Department. He is an IEEE Fellow, IET Fellow, a Distinguished Lecturer for the IEEE Electronics Packaging Society (EPS), an Associate Editor for the IEEE Transactions on CPMT, the founder of the IEEE EPS Dallas Chapter, and a past Chair of the IEEE Dallas Section. .